STUDENT PROFILE

Research Area

Efficient power conversion is an extremely important area of research in modern day electronics. Because of wide range of supply voltages in which the ICs operate, the power conversion or the power management IC (PMIC) needs to work from one voltage range and deliver power at different voltage range. An automotive camera module needs to withstand high input voltage range and deliver multiple output voltages and load currents at very high step-down ratio. An affordable, reliable and highly efficient automotive reverse camera system is found to have all the required challenges for a VLSI designer to make it a very interesting research problem for this thesis work. A combination of DC-DC (switching converters) and low-dropout (LDO) regulator, which is known as hybrid regulator, is found to give the best compromise in terms of system efficiency, output voltage ripple while keeping the overall component count to the minimum. This work focusses on a generic system efficiency improvement solution based on the adaptive dropout of the LDO has been proposed. Optimal circuit design architecture with adaptive LDO dropout has been implemented to handle single DC-DC and upto three LDOs with independent voltage and current requirements. AMS 0.35um high-voltage CMOS technology has been used to design the power management circuits. The design of the two PMICs have been successfully completed and fabricated. The packaged ICs have been tested for their functionality. The innovation has been successfully validated in the lab and the experimental results prove the improved efficiency with respect to the conventional hybrid regulator across the 95% of the load current range and IC junction temperature upto 150 degC. The novel contributions of the thesis work is very generic and can be applied to any hybrid voltage regulators with DC-DC and LDO combination.

Selected Publications

• K. K. G. Avalur and S. Setty, “Power conversion arrangement and method for power conversion,” US Patent number US20150256073A1.

• K. K. G. Avalur and S. Azeemuddin, “A 6-18V Hybrid Power Management IC with adaptive dropout for improved system efficiency upto 150C,” in IEEE Journal of Power Electronics, Emerging and Selected Topics, Vol. 6, Issue: 2, June 2018, pp. 477-484. IEEE, 2018.

• K. K. G. Avalur and S. Azeemuddin, “Power management IC architecture in automotive environment: Case study of rear view camera,” TENCON 2017 - 2017 IEEE Region 10 Conference, Penang, pp. 968-973. IEEE, 2017.

• S. Nyshadham and K. K. G. Avalur, “A 6V to 42V High Voltage CMOS Bandgap Reference robust to RF Interference for automotive applications,” in 30th International Conference on VLSI Design (VLSID), Hyderabad, pp. 187-192. IEEE, 2017.

• K. K. G. Avalur and S. Azeemuddin, “System Efficiency Improvement technique for Automotive Power Management IC using maximum load current selector circuit,” in 29th International Conference on VLSI Design (VLSID), pp. 240-245. IEEE, 2016.

• K. K. G. Avalur and S. Azeemuddin, “Automotive hybrid voltage regulator design with adaptive LDO dropout using load-sense technique,” In Circuits and Systems (APCCAS), 2014 IEEE Asia Pacific Conference on, pp. 571-574. IEEE, 2014.

Education Profile

• B. Tech from Indian Institute of Technology Bombay, Mumbai.

• Masters from Indian Institute of Technology Bombay, Mumbai.

Professional Profile

• Worked as Design Manager in AMS Semiconductors India Pvt Ltd, Hyderabad, Telengana, 17 Years.

Software and Hardware Experience

Projects