Arpan Jain

ms Student
Research Advisor: Dr. Zia Abbas
Co-Advisor:

IIIT-H Email: arpan.jain@research.iiit.ac.in
Linkedin Profile: https://www.linkedin.com/in/arpan-jain-a13944178/



Research Area

My research interest includes designing analog and mixed signal circuits achieving given specification under minimum power, optimizing circuits for ultra-low power applications (in nW) and implementing using latest technologies nodes (55nm, 65nm, 180nm). I have designed a current reference (10nA) stable with process and temperature used in Sub-ranging ADC for complete Temperature sensor system. I have also designed the process independent temperature sensor for that unit under 50nW power. My latest design includes a novel Sub-ranging type integrating ADC and On-chip resistance amplification. This sub-ranging ADC is kind of mixed configuration of Flash and Integrating type ADC. It has advantage of programmable resolution and works under very small power. Its research work is under going. I have developed a CMOS resistance amplifier which is used to increase the value of small resistance to 50 to 150 times (depends on application). These type of circuit can be used in filters for programmable resistance to control the filter frequency and also used in ulta low power voltage and current reference which require very large resistance hence take large area on chip.

Selected Publications
  • Ashfakh Ali, Arpan Jain and Zia Abbas "Voltage Level Adapter for High Swing Applications in CMOS Differential Amplifiers" 2018 VLSI Design and Test (VDAT) 2018
  • Ashfakh Ali, Saikiran Lade, Arpan Jain and Zia Abbas, "A 47nW, 0.7-3.6V wide Supply Range, Resistor Based Temperature Sensor for IoT Applications" Very Large Scale Integration (VLSI-SoC) 2019
  • Arpan Jain, Ashfakh Ali, Saikiran Lade and Zia Abbas "A High PSRR, Stable CMOS Current Reference using Process Insensitive TC of Resistance for Wide Temperature Applications" IEEE International Symposium on Circuits and Systems (ISCAS), 2019
  • An On-Chip Resistance Amplifier, filed for Indian Patent (under process)

Education Profile
  • B. Tech from College of Engineering Roorkee, Uttarakhand, 2016.

Professional Profile
  • Worked as Analog and mixed signal designer Intern in Bluesemi PVT Ltd, T-hub , Hyderabad, Telengana, 6 Months.

Software and Hardware Experience
Cadence IC6 (Virtuoso), Spectre, H-spice, Tanner (Mentor Graphics), Silvaco, Xilinx ISE, Verilog, MATLAB, Altera cyclone 4, Zedboad FPGA

Projects
Delta sigma modulator in Analog mixed signal design, Flash ADC in Analog IC design, TAP controller in Design for testability, Low power current reference in Analog Project, Edge detection using Sobel in VLSI architecture