Center for VLSI and Embedded System Technologies

CONFERENCE PUBLICATIONS

  • S. R. Nagireddy, R. B. Mishra, K. S. C. Karnati and A. M. Hussain, "Capacitance Modelling of Multilayer Perforated Electrodes for Dielectric Elastomer Actuator Applications," Selected for Oral Presentation in MOS-AK India - 2019, IIT-Hyderabad. . [PDF]

  • R. B. Mishra, S. R. Nagireddy, S. Bhattacharjee and A. M. Hussain, "Theoretical Modeling and Numerical Simulation of Elliptical Capacitive Pressure Sensor," Selected for Oral Presentation in MOS-AK India - 2019, IIT-Hyderabad. [PDF]

  • S. R. Nagireddy, R. B. Mishra, K. S. C. Karnati and A. M. Hussain, "Capacitance Modelling of Multilayer Perforated Electrodes for Dielectric Elastomer Actuator Applications," Selected for Oral Presentation in MOS-AK India - 2019, IIT-Hyderabad. [PDF]

  • K. S. C. Karnati, S. R. Nagireddy, R. B. Mishra and A. M. Hussain, "Design of micro heaters inspired by space filling fractal curves" The IEEE Region 10 Symposium TENSYMP 2019, Kolkata, India . [PDF]

  • R. B. Mishra, S. R. Nagireddy, S. Bhattacharjee and A. M. Hussain, "Theoretical Modeling and Numerical Simulation of Elliptical Capacitive Pressure Sensor," Selected for Oral Presentation in MOS-AK India - 2019, IIT-Hyderabad.. [PDF]

  • R. B. Mishra, S. R. Nagireddy, S. Bhattacharjee and A. M. Hussain, "Theoratical Modeling and Numerical Simulation of Elliptical Capacitive Pressure Sensor," Selected for Oral Presentation in MOS-AK India - 2019, IIT-Hyderabad.. [PDF]

  • K. S. C. Karnati, S. R. Nagireddy, R. B. Mishra and A. M. Hussain, "Design of micro heaters inspired by space filling fractal curves" The IEEE Region 10 Symposium TENSYMP 2019, Kolkata, India . [PDF]

  • S. Nyshadham and K. K. G. Avalur, “A 6V to 42V High Voltage CMOS Bandgap Reference robust to RF Interference for automotive applications,” in 30th International Conference on VLSI Design (VLSID), Hyderabad, pp. 187-192. IEEE, 2017.. [PDF]

  • A.Mazumder, A.Guha, S.Dey, Y.Mittal, M.Kar, A.Kundu, “UDGMOSFET Based Analog Circuit Blocks in Cadence Virtuoso”,Devices for Integrated Circuit (DevIC), 2017 . [PDF]