Prateek Gupta

ms Student
Research Advisor: Dr. Zia Abbas
Co-Advisor:

IIIT-H Email: prateek.g@research.iiit.ac.in
Linkedin Profile: http://www.linkedin.com/in/prateekgiiit



Research Area

I work in the field of low/ultra low power vlsi. My research topic is to find the robust sizing of the transistors present in the logic circuits using various optimization algorithms for minimum leakage power, minimum propagation delay, area and various other performance specifications. The technology nodes i am working on are 45nm, 32nm, 22nm and below.

Selected Publications
  • Prateek Gupta, Shirisha Gourishetty, Harshini Mandadapu, Zia Abbas, “PVT Variations Aware Robust Transistor Sizing forPower-Delay Optimal CMOS Digital Circuit Design”, IEEE International Symposium on Circuits and Systems (ISCAS),2019
  • Prateek Gupta, Harshini Mandadapu, Shirisha Gourishetty, Zia Abbas, “Robust Transistor Sizing for Improved performance in Digital Circuits using Optimization Algorithms” 20th International Symposium on Quality Electronic Design (ISQED), 2019
  • Prateek Gupta, Shubham Kumar, Zia Abbas, “Optimal Transistor Sizing of Full-Adder Block to Reduce Standby Leakage Power.” 88-99, VDAT 2018
  • P Gupta, Z Abbas, "Multi-Objective Optimization Algorithm Based Transistor Sizing for Improved Power -Delay in Digital Circuits", accepted in 15th IEEE India Council International Conf. (INDICON)

Education Profile
  • B. Tech from Dr. A.P.J. Abdul Kalam Technical University, Lucknow, Uttar Pradesh.

Professional Profile
  • Worked as Summer Intern on Antenna Design and Simulation for GPS applications in IIT - BHU, Varanasi, India4 weeks.
  • Worked as Assistant Professor in at IIIT Hyderabad, India2018- Present.
  • Worked as Technology AdvisorInterNext till in , 2019.
  • Worked as Post-Doctoral Researcher in , Harvard University till2018.
  • Worked as Design Engineer in , Analog Devices till2011.
  • Worked as Consultant in , Pricewaterhousecoopers till2010.
  • Worked as Engineering Intern in , ITC Limited, Saharanpur Area, India till2008.

Software and Hardware Experience
HSPICE, Cadence Virtuoso, Custom Compiler, NgSpice, ASITIC CAD tool, Verilog, Matlab, Python, C, Shell script, FPGAs

Projects
Design of Multi band FIR filter and implementation on FPGA, Design of VCO for RF applications, Implementation of Analog to Information (A to I) converter, Netflix Challenge, GUI based application to simulate Digital Circuits and implement SCOAP, Robust transistor sizing of digital cells using optimization algorithms